Invoke payloads for OS boot environment and possible XPU and runtime. Invoking the sFSP for SOC and/or XPU specific resources Initialize the board by programming board specific resources and Therefore, the missions of POL layer are: With industry standard tables that are an amalgam of silicon andįigure 2 Layers of Universal Scalable Firmware
Work, and produces the interface to launch the payload environment along The Platform Orchestration Layer coordinates the board-specificīoot sequence, invoking the sFSP interfaces for any silicon specific (SAL), as abstracted by the Scalable FSP interface, and the Payload The Platform Orchestration Layer sits between the SOC Abstraction Layer Solution which fulfills all the modern FW requirements in a superĬomplex HW IP centric world. Motivation for POL ¶įollowing the Next Generation Firmware initiative, the Intel systemįirmware (BIOS) is evolving to be a multilayer, modular, scalable FW
Package (sFSP) interface and payload to coordinate the overall platform Writing platform code that leverage a Scalable Intel Firmware Support The Platform Orchestration Layer (POL) is aimed to provide guidelines on Platform Orchestration Layer (POL) ¶ 3.1.
